From a5e5b3eafdfe2129004d47182861ccb942726a50 Mon Sep 17 00:00:00 2001 From: "root@xenhog02.amd.com" Date: Sun, 25 Feb 2007 23:58:33 -0600 Subject: [PATCH] fix PDPE entry in P2M table under 32bit PAE hypervisor --- xen/arch/x86/mm/p2m.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/xen/arch/x86/mm/p2m.c b/xen/arch/x86/mm/p2m.c index cc42ed8c6a..2161fd929c 100644 --- a/xen/arch/x86/mm/p2m.c +++ b/xen/arch/x86/mm/p2m.c @@ -145,6 +145,10 @@ p2m_next_level(struct domain *d, mfn_t *table_mfn, void **table, paging_write_p2m_entry(d, gfn, p2m_entry, new_entry, 4); break; case PGT_l2_page_table: +#if CONFIG_PAGING_LEVELS == 3 + /* for PAE mode, PDPE only has PCD/PWT/P bits available */ + new_entry = l1e_from_pfn(mfn_x(page_to_mfn(pg)), _PAGE_PRESENT); +#endif paging_write_p2m_entry(d, gfn, p2m_entry, new_entry, 3); break; case PGT_l1_page_table: -- 2.30.2